The MXL-LVDS-DPHY-DSI-TX is a combo PHY that consists of a high-frequency low-power, low-cost, source-synchronous, Physical Layer supporting the MIPI® Alliance Standard for D-PHY and a high performance 4-channel LVDS Serializer implemented using digital CMOS technology. (Learn more about Mixel’s MIPI ecosystem at Mixel MIPI Central which gives you access to Mixel’s best of class MIPI ecosystem supply chain partners.)
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In LVDS mode, both the serial and parallel data are organized into 4 channels. The parallel data is 7 bits wide per channel. The input clock is 25MHz to 150MHz. The serializer is highly integrated and requires no external components. The circuit is designed in a modular fashion and desensitized to process variations. This facilitates process migration, and results in a robust design.
–Supports a variety of video interfaces (RGB, OpenLDI (LVDS), MIPI CSI-2 & DSI, HDMI) –Aggregates video, audio and clock as well as bi-directional signal onto one stream. FPD-Link™ Highlights 6. Video, Bidirectional Control (I²C, SPI), GPIO and Power. DS90UH941AS – 2K DSI FPD-Link Serializer Dual DSI to Dual FPD-Link III Serializer. MIPI D-PHY / Display Serial Interface (DSI) receiver provides a high-bandwidth interface to video processor or FPGA Dual DSI input ports with up to 4 data lanes each Up to 1.5 Gbps per lane.
D-PHY Features:
LVDS Features:
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The Mixed-Signal Physical Layer (PHY) is the cornerstone of the MIPI® standard’s ability to deliver high data rate at low-power. Mixel delivers silicon-proven MIPI PHYs NOW and our customers are going into production with their advanced products incorporating Mixel’s MIPI IP cores.
Mixel is a Contributing member to the MIPI Alliance since 2006 and is an active contributor to the MIPI PHY working group, participating in the development of the MIPI PHY specification developments.
We provide a complete MIPI solution including the PHY, the Controller, and a development platform.
The D-PHY, C-PHY, and the M-PHY are three different MIPI PHYs, specifically targeted at lower-power application such as mobile, IoT, wearables, and automotive. They operate over a very wide range of data-rates and support multiple power modes so mobile suppliers can deliver fast application response while preserving battery life. Their serial architectures with both a source synchronous separate clock and an embedded clock provide designers with choices from simplicity to high performance. For more information on Mixel’s D-PHY, C-PHY, and M-PHY follow the links on this page.
* MIPI(™) word marks and logos are trademarks owned by MIPI Alliance, Inc. and any use of such marks by Mixel Inc. is under license. Other trademarks and trade names are those of their respective owners.
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